//////////////////////////////////////////////////////////////////////////// // Copyright (c) Winnov Inc., 1993-6. All rights reserved. // caviario.h //////////////////////////////////////////////////////////////////////////// #ifndef _CAVIARIO_INCLUDED #define _CAVIARIO_INCLUDED #define CAVIAR_AUDIO_HALF_BUF_SIZE 0x01000 #define CAVIAR_AUDIO_BUF_SIZE 0x02000 #define CAVIAR_CPB_SIZE 0x00100 #define CAVIAR_CODE_BUF_SIZE 0x01000 #define CIO_BOARD0CONFIG 0x5A04 #define CIO_BOARD1CONFIG 0x5A05 #define CIO_PCICONFIG0 0x00D8 #define CIO_PCICONFIG1 0x00D9 #define CIO_PORT0SELECT 0x0001 #define CIO_PORT1SELECT 0x0002 #define CIO_PORT2SELECT 0x0003 #define CIO_ADLIB 0x0040 #define CIO_BOARD0PORT0 0x0160 #define CIO_BOARD0PORT1 0x0150 #define CIO_BOARD0PORT2 0x0140 #define CIO_BOARD0PORT3 0x8160 #define CIO_BOARD0PORT4 0x8150 #define CIO_BOARD0PORT5 0x8140 #define CIO_BOARD1PORT0 0x0120 #define CIO_BOARD1PORT1 0x0110 #define CIO_BOARD1PORT2 0x0100 #define CIO_BOARD1PORT3 0x8120 #define CIO_BOARD1PORT4 0x8110 #define CIO_BOARD1PORT5 0x8100 #define CIO_PCIPORT0 0xF000 #define CIO_PCIPORT1 0xE800 #define CIO_PCIPORT2 0xE000 #define CPB_HEADER 0 #define CPB_AUDPTR 1 #define CPB_AUDATTN 2 #define CPB_AUDGAIN 3 #define CPB_AUDMIX1 4 #define CPB_AUDMIX2 5 #define CPB_MXRPTR 6 #define CPB_MXWPTR 7 #define CPB_VID1PTR 8 #define CPB_VID2PTR 9 #define CPB_RLDPTR1 10 #define CPB_RLDPTR2 11 #define CPB_SPLPTR 12 #define CPB_D 13 #define CPB_E 14 #define CPB_DEFAULT 15 #define CIO_NREGS 32 #define REGTOINDEX(reg) ((reg)&31) //#define ISAOFFSET(reg) ((reg)<<12) //#define PCIOFFSET(reg) ((reg)<<2) #define CIO_HSTPTR 0x0000 #define CIO_HST2PTR 0x0001 #define CIO_SPLPTR 0x0002 #define CIO_AUDPTR 0x0003 #define CIO_VIDPTR 0x0004 #define CIO_MXRPTR 0x0005 #define CIO_VID2PTR 0x0006 #define CIO_MXWPTR 0x0007 #define CIO_HSTDAT 0x0008 #define CIO_HST2DAT 0x0009 #define CIO_RLDPTR1 0x000A #define CIO_RLDPTR2 0x000B #define CIO_MMA 0x000C #define CIO_CTL 0x000D #define CIO_ISR 0x000E #define CIO_ITR 0x000F #define CIO_ATTN 0x0010 #define CIO_GAIN 0x0011 #define CIO_FREQ 0x0012 #define CIO_4C00 0x0013 #define CIO_AUDMIX1 0x0014 #define CIO_AUDMIX2 0x0015 #define CIO_5800 0x0016 #define CIO_5C00 0x0017 #define CIO_VOF 0x0018 #define CIO_VCT 0x0019 #define CIO_6800 0x001A #define CIO_CTL2 0x001A #define CIO_6C00 0x001B #define CIO_CTLL 0x001C #define CIO_7400 0x001D #define CIO_7800 0x001E #define CIO_TSTMODE 0x001F #define CIO_HST1PTR CIO_HSTPTR #define CIO_VID1PTR CIO_VIDPTR #define CIO_HST1DAT CIO_HSTDAT #define CIO_HSTPTR_2 0x0020 #define CIO_HST2PTR_2 0x0021 #define CIO_SPLPTR_2 0x0022 #define CIO_AUDPTR_2 0x0023 #define CIO_VIDPTR_2 0x0024 #define CIO_MXRPTR_2 0x0025 #define CIO_VID2PTR_2 0x0026 #define CIO_MXWPTR_2 0x0027 #define CIO_HSTDAT_2 0x0028 #define CIO_HST2DAT_2 0x0029 #define CIO_RLDPTR1_2 0x002A #define CIO_RLDPTR2_2 0x002B #define CIO_MMA_2 0x002C #define CIO_CTL_2 0x002D #define CIO_ISR_2 0x002E #define CIO_ITR_2 0x002F #define CIO_ATTN_2 0x0030 #define CIO_GAIN_2 0x0031 #define CIO_FREQ_2 0x0032 #define CIO_4C00_2 0x0033 #define CIO_AUDMIX1_2 0x0034 #define CIO_AUDMIX2_2 0x0035 #define CIO_5800_2 0x0036 #define CIO_5C00_2 0x0037 #define CIO_VOF_2 0x0038 #define CIO_VCT_2 0x0039 #define CIO_6800_2 0x003A #define CIO_6C00_2 0x003B #define CIO_CTLL_2 0x003C #define CIO_7400_2 0x003D #define CIO_7800_2 0x003E #define CIO_TSTMODE_2 0x003F #define CIO_HST1PTR_2 CIO_HSTPTR_2 #define CIO_VID1PTR_2 CIO_VIDPTR_2 #define CIO_HST1DAT_2 CIO_HSTDAT_2 // MMA Register #define CIO_NWDBIT 0x8000 /* NOWS Write Disable */ #define CIO_NRDBIT 0x4000 /* NOWS Read Disable */ #define CIO_MMAFIELD 0x3E00 /* Memory Map Address */ #define CIO_MMEBIT 0x0100 /* Memory Map Enable */ #define CIO_FMFIELD 0x00C0 /* FM config, Read only */ #define CIO_DSSFIELD 0x0030 /* Disney Sound Source config, Read Only */ #define CIO_CVXFIELD 0x000C /* CoVoX speech thing config, Read Only */ #define CIO_REVFIELD 0x0003 /* WAVIA ASIC Revision, Read Only */ #define CIO_AVGCENBIT 0x8000 /* W97 and later: Average Chroma Enable */ #define CIO_AUDXSEL_INT97 0x4000 /* W97: Crystal selection is internal (using IMI bit) */ #define CIO_AUDXSEL 0x4000 /* WIMP: Crystal selection (replaces IMI bit) */ #define CIO_CS4218BIT 0x2000 /* W97 and later: 4218 codec configuration */ #define CIO_SAA7110 0x1000 /* W97 and later: select SAA7110 or vpx! */ #define CIO_BANKCS 0x0800 /* W97 and later: to enable the memory chip select */ #define CIO_DHYYY 0x0400 /* W97 and later: Luma only Delta Huffman */ #define CIO_DHRES 0x0200 /* W97 and later: Delta Huffman Residual alogorithm */ #define CIO_DHRND 0x0100 /* W97 and later: Delta Huffman Rounding algorithm */ #define CIO_MEDREN 0x0080 /* W97 and later: Median Filter Return Effect */ #define CIO_VIDVCI 0x0040 /* W97 and later: DVCI video format */ #define CIO_VERSIONFIELD 0x0030 /* W95 and later: Read Only Version */ #define CIO_WAVIIDFIELD 0x000F /* All Versions: WAVI ASIC Revision, Read Only */ #define CIO_FULLID 0x003F /* completely identify the chip version... W95 and above! */ #define CIO_WAVI1 0x0002 /* The original Samsung */ #define CIO_WAVI95 0x0012 /* Hundai part with line avg during Huffman fix */ #define CIO_WAVI97 0x0022 #define CIO_WIMP 0x0003 // CTL Register #define CIO_VSEBIT 0x8000 /* Video Sampler Enable */ #define CIO_VSTBIT 0x4000 /* Video Status */ #define CIO_VSSBIT 0x2000 /* Video Source Select */ #define CIO_VSCBIT 0x1000 /* Video Source Component(1)/Composite(0) */ #define CIO_RGBBIT 0x0800 /* RGB(1)/YUV(0) Video Space */ #define CIO_VFSFIELD 0x0700 /* Video Filter Select */ #define CIO_VFSFIELD_NONE 0x0000 /* Bypass filters */ #define CIO_VFSFIELD_MED3 0x0100 /* 3 tap median filter */ #define CIO_VFSFIELD_FIR2 0x0200 /* 2 pix FIR filter */ #define CIO_VFSFIELD_BOTH2 0x0300 /* Median and 2 pix FIR */ #define CIO_VFSFIELD_MED4 0x0400 /* 4 pix FIR filter */ #define CIO_VFSFIELD_BOTH4 0x0500 /* Median and 4 pix FIR */ #define CIO_VFSFIELD_MED8 0x0600 /* 8 pix FIR filter */ #define CIO_VFSFIELD_BOTH8 0x0700 /* Median and 8 pix FIR filter */ #define CIO_VDFFIELD 0x00E0 /* Video Data Capture Format */ #define CIO_VDFFIELD_DYCQ 0x0000 /* DYCQ */ #define CIO_VDFFIELD_YCQ 0x0020 /* YCQ */ #define CIO_VDFFIELD_YCH 0x0040 /* YCH */ #define CIO_VDFFIELD_RGB 0x0060 /* RGB */ #define CIO_VDFFIELD_DH4 0x0080 /* DH4 */ #define CIO_VDFFIELD_DH5 0x00A0 /* DH5 */ #define CIO_VDFFIELD_DH6 0x00C0 /* DH6 */ #define CIO_VDFFIELD_DH7 0x00E0 /* DH7 */ #define CIO_CTLBIT4 0x0010 /* not used */ #define CIO_I2CBIT 0x0008 /* I2C Bus Clock */ #define CIO_IMIBIT 0x0004 /* IM-Bus Identify */ #define CIO_PIXGEN 0x0004 /* Pixel generator */ #define CIO_IMCBIT 0x0002 /* IM-Bus Clock */ #define CIO_IMDBIT 0x0001 /* IM-Bus Data */ // CTL2 Register #define CIO_CCLKEN 0x8000 //Enable CCLK #define CIO_VCLK_INV 0x4000 //Invert VCLK #define CIO_DPLL_EN 0x2000 //Digital PLL enable #define CIO_VCPHASE 0x1000 //Vclock Phase control #define CIO_VCLK_EN 0x0C00 //Vclock source selection #define CIO_VCLK_EN_GND 0x0C00 //00 for ground #define CIO_VCLK_EN_MOV2 0x0400 // Mclock/2 #define CIO_VCLK_EN_VEXT 0x0800 // External Vclock #define CIO_VCLK_EN_MCLK 0x0C00 // MClock #define CIO_MCLK_EN 0x0300 //Mclock source selection #define CIO_MCLK_EN_GND 0x0300 //00 for ground #define CIO_MCLK_EN_GND2 0x00 //00 for ground (reversed already!) #define CIO_MCLK_EN_COV2 0x0100 // CCD clock/2 #define CIO_MCLK_EN_AUD 0x0200 // Audio clock #define CIO_MCLK_EN_CCLK 0x0300 // CCD Clock #define CIO_GPIO2_OE 0x0080 //GPIO 2 OE #define CIO_GPIO1_OE 0x0040 //GPIO 1 OE #define CIO_GPIO0_OE 0x0020 //GPIO 0 OE #define CIO_GPIO4 0x0010 //GPIO 4 = RST_OUT #define CIO_GPIO3 0x0008 //GPIO 3 #define CIO_GPIO2 0x0004 //GPIO 2 #define CIO_GPIO1 0x0002 //GPIO 1 #define CIO_GPIO0 0x0001 //GPIO 0 // ISR/ITR #define CIO_VIEBIT 0x8000 /* Video Interrupt Enable */ #define CIO_VI2BIT 0x4000 /* Video Interrupt 1, Read Only */ #define CIO_VI1BIT 0x2000 /* Video Interrupt 2, Read Only */ #define CIO_AIEBIT 0x1000 /* Audio Interrupt Enable */ #define CIO_AISFIELD 0x0C00 /* Audio Interrupt Status, Read Only */ #define CIO_AISFIELD_NOINT 0x0000 /* no audio interrupt */ #define CIO_AISFIELD_1INT 0x0400 /* one audio interrupt */ #define CIO_AISFIELD_OVERRUN 0x0800 /* audio overrun */ #define CIO_AISFIELD_2INT 0x0C00 /* two audio interrupts */ #define CIO_FIEBIT 0x0200 /* FM Interrupt Enable */ #define CIO_FMIBIT 0x0100 /* FM Interrupt, Read Only */ #define CIO_SIEBIT 0x0080 /* SCSI Interrupt Enable */ #define CIO_SCIBIT 0x0040 /* SCSI Controller Interrupt, Read Only */ #define CIO_CIEBIT 0x0020 /* Control-L Interrupt Enable */ #define CIO_CLIBIT 0x0010 /* Control-L Interrupt, Read Only */ #define CIO_IDTBIT 0x0008 /* Interrupt Detect, Read Only */ #define CIO_ITMBIT CIO_IDTBIT /* Interrupt test mode, Write Only */ #define CIO_ISELFIELD 0x0007 /* Interrupt Select */ #define CIO_ISELFIELD_NONE 0x0000 /* Interrupts disconnected */ #define CIO_ISELFIELD_IRQ2 0x0001 /* IRQ2 */ #define CIO_ISELFIELD_IRQ5 0x0002 /* IRQ5 was reversed with 7*/ #define CIO_ISELFIELD_IRQ7 0x0003 /* IRQ7 was reversed with 5 */ #define CIO_ISELFIELD_IRQ10 0x0004 /* IRQ10*/ #define CIO_ISELFIELD_IRQ11 0x0005 /* IRQ11*/ #define CIO_ISELFIELD_IRQ12 0x0006 /* IRQ12*/ #define CIO_ISELFIELD_IRQ15 0x0007 /* IRQ15*/ // Audio ATTN #define ATTN_MASK 0x0FFF /* mask of useable bits */ #define CIO_UNUSEDFIELD 0xF000 /* not used */ #define CIO_ATTLFFIELD 0x0F00 /* Left Output Channel Attenuation, Write Only */ #define CIO_ATTRTFIELD 0x00F0 /* Right Output Channel Attenuation, Write Only */ // 4218 format of the upper 12 bits: #define CIO_4218_ATTLFFIELD 0x3E00 /* 4218: 5 bit Left Output Channel Attenuation, Write Only */ #define CIO_4218_ATTRTFIELD 0x01F0 /* 4218: 5 bit Right Output Channel Attenuation, Write Only */ // common between 4216 and 4218 #define CIO_ASS2FIELD 0x000C /* Audio Source Select, Write Only */ #define CIO_ASS2FIELD_VID1 0x0000 #define CIO_ASS2FIELD_MIC 0x0004 #define CIO_ASS2FIELD_VID2 0x0008 #define CIO_ASS2FIELD_LINE 0x000C #define CIO_AFSBIT 0x0002 /* Audio freq select (SPAM only) 0=22.5792,1=24.576 */ #define CIO_AXEBIT 0x0001 /* Audio expansion enable */ // Audio GAIN #define CIO_MUTBIT 0x0400 /* Mute, Write Only */ #define CIO_ISLBIT 0x0200 /* Input Select Left channel, Write Only */ /* 0=LIN1, 1=IN2 (ASS2) */ #define CIO_ISRBIT 0x0100 /* Input Select Right channel, Write Only */ /* 0=LIN1, 1=IN2 (ASS2) */ #define CIO_GAINLFFIELD 0x00F0 /* Left Input Channel Gain, Write Only */ #define CIO_GAINRTFIELD 0x000F /* Right Input Channel Gain, Write Only */ // Audio FREQ #define CIO_AOVFIELD 0xFF00 /* Audio Output Volume */ #define CIO_ACEBIT 0x0080 /* Audio Converter Enable */ #define CIO_APEBIT 0x0040 /* Audio Phase Error */ #define CIO_AMSBIT 0x0020 /* Audio Mode Stereo */ #define CIO_ADDBIT 0x0010 /* Audio Digital Port Data */ #define CIO_FREQFIELD 0x000F /* Audio Frequency */ #define CIO_FREQFIELD_44100 0x0001 #define CIO_FREQFIELD_29400 0x0002 #define CIO_FREQFIELD_22050 0x0003 #define CIO_FREQFIELD_14700 0x0005 #define CIO_FREQFIELD_11025 0x0007 #define CIO_FREQFIELD_08820 0x0009 #define CIO_FREQFIELD_07350 0x000B // Audio MIX 1/2 #define CIO_MIXRFIELD 0xFF00 /* Right channel output volume */ #define CIO_MIXLFIELD 0x00FF /* Left channel output volume */ // Video Offset #define CIO_VOFCRFIELD 0xF000 /* Video Offset Chroma Red */ #define CIO_VOFCBFIELD 0x0F00 /* Video Offset Chroma Blue */ #define CIO_VOFYFIELD 0x00F0 /* Video Offset Luma */ #define CIO_GBCBIT 0x0008 /* Video Input Gray to Binary on Chroma */ #define CIO_GBYBIT 0x0004 /* Video Input Gray to Binary on Luma */ #define CIO_VSPBIT 0x0002 /* Video Input VSP Enable */ #define CIO_VSDBIT 0x0001 /* Video Input VSD Detect, Read Only */ // Video Contrast Reg #define CIO_VCTCRFIELD 0xF000 /* Cr contrast */ #define CIO_VCTCBFIELD 0x0F00 /* Cb Contrast */ #define CIO_VCTYFIELD 0x00F0 /* Y Contrast */ #define CIO_VHSDFIELD 0x000F /* Video Horizontal Synch Delay */ // Control-L Reg #define CIO_STRBIT 0x8000 /* Control-L Start bit */ #define CIO_TRGBIT 0x4000 /* Control-L Trigger Send */ #define CIO_ARMBIT 0x2000 /* Control-L Armed, Read Only */ #define CIO_VVSBIT 0x1000 /* Video Vert Synch, Read Only */ #define CIO_CLDBIT 0x0800 /* Control-L Direct Data */ #define CIO_E2BIT 0x0400 /* TBD */ #define CIO_E1BIT 0x0200 /* TBD */ #define CIO_E0BIT 0x0100 /* TBD */ #define CIO_CLDATA 0x00FF /* Control L Data */ #endif // ndef _CAVIARIO_INCLUDED